<math> R = \frac{cT_s}{2B} f_b = \frac{(3\times 10^8)(100\times 10^{-6})}{2(10\times 10^6)} \left( 10^6 \right) = 1500\text{m} </math>
== Putting the Transmitter and Receiver Together With the Channel Modeling an FMCW System with Triangular Chirp Modulation ==
The following is a list of parts needed for this part of the tutorial lesson:
! scope="col"| Part Value
|-
! scope="row"| A1V1 - V2| Digital SourceTriangular Wave Generator| Data TBDDefaults, fo= 20KHz
|-
! scope="row"| A2X1| 1-Bit DAC Conversion BridgeFM Modulator Block| Defaults, out_high fc = 51GHz, t_rise max = 100p, t_fall = 100p10MHz
|-
! scope="row"| X1 X2 | Wilkinson Power DividerIdeal Signal Splitter| Defaults, fc (k = 1GHz0.5)
|-
! scope="row"| X2, X5 X3 | QAM Modulator Ideal Delay Block| Defaults, fc = 3GHz, ac delay = 5V10u
|-
! scope="row"| XTL1E1 | Generic TVoltage-LineControlled Voltage Source| Defaults: Z0 = 50, eeff gain = 11e-4, controlled by v(3, alpha = 0.5dB/m, len = 10,000mm )
|-
! scope="row"| R1 - R2A1 | ResistorGain Block| 50|-! scopeDefaults, gain ="row"| VREF| DC Voltage Source| 2V5e+3
|-
! scope="row"| X3A2 | Ideal Buffer Multiplier Block
| Defaults
|-
! scope="row"| A3
| Gain Block (must be made unique)
| Defaults, gain = 50
|-
! scope="row"| X4
| Resistive Power DividerGeneric Lowpass Filter Block| Defaults, len_in Cutoff = 2mm, len_out = 2mm2Meg
|-
! scope="row"| A1 | Limiter Block| Defaults, gain = 5, out_lower_limit = -1V, out_upper_limit = 1V|-! scope="row"| X6 | Ideal Full-Wave Rectifier Block| Defaults, gain = 5|-! scope="row"| X7X5
| Ideal Comparator Block
| Defaults, gain = 10Gain
|-
! scope="row"| R1Rant
| Resistor
| 50
|-
! scope="row"| R2RL
| Resistor
| 60|-! scope="row"| R2| Resistor| 80|-! scope="row"| C1| Capacitor| 10p|-! scope="row"| A4| 1-Bit ADC Conversion Bridge| Defaults, in_high = 2, t_rise = 100p, t_fall = 100p|-! scope="row"| Out1| Digital Output| N/A50
|}
In this part of the tutorial lesson, you will put the QAM modulator build and demodulator circuits of the previous parts together test an FMCW system with a channel to simulate a communication linksawtooth chirp modulation. In a wireless system, the channel is the free space between the transmit and receive antennas. One way of modeling the free-space channel in [[RF.Spice A/D]] is to use a dependent voltage source at the input provides three types of the receiver that is driven by the voltage at the output of the transmitterchirp generator devices. The proportionality constant can be set to All three are based on sawtooth modulation but each provides a very small number representing the free-space path lossdifferent output waveform. They are sinusoidal chirp generator, triangular wave chirp generator and square wave chirp generator. For this project, however, you will use a wired channel or cable represented by a lossy transmission line segment. In that casethe first type, the receiver which can be directly connected to the output port of the T-Line segment. You will use a TEM line with Z<subaccess from '''Menu >0</subParts > = 50Waveform Generation Blocks > Chirp Generators > Sine Wave Chirp Generator'''. Set the '''Chirp Period''' to 100&Omegamu;, eeff = 1 and alpha = 0s (i.5dB/me. At a length of 10m10kHz chirp), and set the values of the total single attenuation due two [[parameters]] '''freq_low''' and '''freq_high''' to the channel will be 5dB1GHz and 1.01GHz, respectively. Therefore, B = 1.01GHz - 1GHz = 10MHz.
You are now ready to put it all together. This time you will send the QAM-modulated output of the transmitter circuit you built earlier through the transmission line channel and will feed it as the input of your receiver circuit. This signal will replace the AM-modulated voltage source you used in the previous section to feed your QAM demodulator circuit. For this part of the project, you will place an '''Ideal Buffer Block''' for isolation between the transmission line and the rest of the receiver circuit. The '''Limiter Block''' will both amplify and clip the signal from the top and bottom. Set the gain to 5 and set the lower and upper limits of the output voltage to -1V and +1V, respectively. Also define a gain of 5 for the Ideal Full-Wave Rectifier Block.
<table>
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<td>
[[File:SysTUT3 42.png|thumb|550px|The property dialog of the Limiter Block.]]
</td>
</tr>
</table>
Place and connect all the parts as shown in the figure below. Note that the part values of the peak detector's lowpass filter have changed from the previous part. Also, the reference voltage of the '''Ideal Comparator Block''' has been decreased to 2V.
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<td>
[[File:SysTUT3 40.png|thumb|750px|The schematic of the COMM link including the transmitter and receiver circuits and the cable channel.]]
</td>
</tr>
</table>
As the transmitted signal propagates through the transmission line, besides phase change or time delay, it also gets attenuated by 5dB over its whole length. The QAM-modulated signal signal arrives at the input of the receiver after a time delay equal to:
<math> \Delta t = \frac{L}{c} = \frac{10m}{3\times 10^8 m/s} = 33.3ns </math>
To plan your Transient Test, keep in mind that the input binary sequence has a total duration of 20ns, of which the last 4ns are zeros (silent). In addition, the channel causes a time delay of 33.3ns. So choose the following [[parameters]] to run a Transient Test of your QAM data communications link:
{| border="0"
|-
| valign="top"|
|-
{| class="wikitable"
|-
! scope="row"| Start Time
| 0
|-
! scope="row"| Stop Time
| 55n
|-
! scope="row"| Linearize Step
| 10p
|-
! scope="row"| Step Ceiling
| 10p
|-
! scope="row"| Preset Graph Plots
| a1(digital), v(6), v(7), out1(digital)
|}
The results are shown in the figure below. The plots in light and dark blue represent the voltage signals at the input and output of the long lossy transmission line. As you can from the figure, the demodulated signal at the digital output represents a fairly good replica of the input binary sequence.
<table>
<tr>
<td>
[[File:SysTUT3 41.png|thumb|750px|The graph of the digital input and output binary sequences of the QAM Modulator-Demodulator combo circuit, plotted together with the voltages at the input v(6) and output v(7) of the transmission line channel.]]
</td>
</tr>
</table>
<p> </p>
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